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Part Number: V54C316162VC

 

 

 

 

Description: The V54C316162VC is a 16,777,216 bits synchronous high data rate DRAM organized as 2 x 524,288 words b...


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V54C316162VC General Description


The V54C316162VC is a 16,777,216 bits synchronous high data rate DRAM organized as 2 x 524,288 words by 16 bits. The device is designed to comply with JEDEC standards set for synchronous DRAM products, both electrically and mechanically. Synchronous design allows precise cycle control  with the system clock. The CAS latency, burst length and burst sequence must be programmed into device prior to access operation.

V54C316162VC Maximum Ratings

Operating temperature range ............................................0 to 70 °C
Storage temperature range ......................................... -55 to 150 °C
Input/output voltage ........................................... -0.3 to (VCC+0.3) V
Power supply voltage ..................................................... -0.3 to 4.6 V
Power dissipation ........................................................................ 1 W
Data out current (short circuit) ................................................. 50 mA

V54C316162VC Features

 JEDEC Standard 3.3V Power Supply
 The V54C316162VC is ideally suited for high performance graphics peripheral applications
 Single Pulsed RAS Interface
 Programmable CAS Latency: 2, 3
 All Inputs are sampled at the positive going edge of clock
 Programmable Wrap Sequence: Sequential or Interleave
 Programmable Burst Length: 1, 2, 4, 8 and Full Page for Sequential and 1, 2, 4, 8 for Interleave
 UDQM & LDQM for byte masking
 Auto & Self Refresh
 2K Refresh Cycles/32 ms
 Burst Read with Single Write Operation

V54C316162VC Connection Diagram

V54C316162VC  Connection Diagram

V54C316162VC datasheet

V54C316162VC
PDF/DataSheet Download

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