WCMA1008C1X

Features: • Voltage Range-4.5V5.5V• Low active power-Typical active current: 6 mA @ f = fmax (70 ns speed)• Low standby current• Automatic power-down when deselected• TTL-compatible inputs and outputs• Easy memory expansion with CE1, CE2, and OE features• ...

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WCMA1008C1X Picture
SeekIC No. : 004545468 Detail

WCMA1008C1X: Features: • Voltage Range-4.5V5.5V• Low active power-Typical active current: 6 mA @ f = fmax (70 ns speed)• Low standby current• Automatic power-down when deselected• T...

floor Price/Ceiling Price

Part Number:
WCMA1008C1X
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/27

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Product Details

Description



Features:

• Voltage Range
-4.5V5.5V
• Low active power
-Typical active current: 6 mA @ f = fmax (70 ns speed)
• Low standby current
• Automatic power-down when deselected
• TTL-compatible inputs and outputs
• Easy memory expansion with CE1, CE2, and OE features
• CMOS for optimum speed/power



Pinout

  Connection Diagram


Specifications

Storage Temperature .................................65 to +150
Ambient Temperature with
Power Applied............................................ 55 to +125
Supply Voltage on VCC to Relative GND ....... 0.5V to +7.0V
DC Voltage Applied to Outputs
in High Z State[1] ...................................0.5V to VCC +0.5V
DC Input Voltage[1]................................0.5V to VCC +0.5V
Current into Outputs (LOW) .........................................20 mA
Static Discharge Voltage...............................................2001V
(per MIL-STD-883, Method 3015)
Latch-Up Current .....................................................>200 mA



Description

The WCMA1008C1X is a high-performance CMOS static RAM organized as 128K words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE1), an active HIGH Chip Enable (CE2), an active LOW Output Enable (OE), and three-state drivers. WCMA1008C1X has an automatic power-down feature that reduces power consumption by more than 75% when deselected.

Writing to the WCMA1008C1X is accomplished by taking Chip Enable 1 (CE1) and Write Enable (WE) inputs LOW and Chip Enable 2 (CE2) input HIGH. Data on the eight I/O pins (I/O0 through I/O7) is then written into the location specified on the address pins (A0 through A16).

Reading from the WCMA1008C1X is accomplished by taking Chip Enable 1 (CE1) and Output Enable (OE) LOW while forcing Write Enable (WE) and Chip Enable 2 (CE2) HIGH. Under these conditions, the contents of the memory location specified by the address pins will appear on the I/O pins.

The eight input/output pins of WCMA1008C1X (I/O0 through I/O7) are placed in a high-impedance state when the device is deselected (CE1 HIGH or CE2 LOW), the outputs are disabled (OE HIGH), or during a write operation (CE1 LOW, CE2 HIGH, and WE LOW) The WCMA1008C1X is available in a standard 32-pin 450-mil-wide body width SOIC and 32-pin TSOP type I.




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