ZL30409

Features: • Supports Telcordia GR-1244-CORE Stratum 4 timing for DS1 interfaces• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces• Selectable 19.44 MHz, 2.048MHz, 1.544MHz or 8kHz input reference signals• Provides C1.5, C2, C4, C6, C8, CC16, and ...

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ZL30409 Picture
SeekIC No. : 004550962 Detail

ZL30409: Features: • Supports Telcordia GR-1244-CORE Stratum 4 timing for DS1 interfaces• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces• Selectable 19.44 MHz,...

floor Price/Ceiling Price

Part Number:
ZL30409
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/25

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Product Details

Description



Features:

• Supports Telcordia GR-1244-CORE Stratum 4 timing for DS1 interfaces
• Supports ETSI ETS 300 011, TBR 4, TBR 12 and TBR 13 timing for E1 interfaces
• Selectable 19.44 MHz, 2.048MHz, 1.544MHz or 8kHz input reference signals
• Provides C1.5, C2, C4, C6, C8, CC16, and C19 (STS-3/OC3 clock divided by 8) output clock signals
• Provides 5 styles of 8 KHz framing pulses
• Holdover frequency accuracy of 0.05 PPM
• Holdover indication
• Attenuates wander from 1.9Hz
• Fast lock mode
• Provides Time Interval Error (TIE) correction
• Accepts reference inputs from two independent sources
• JTAG Boundary Scan



Application

• Synchronization and timing control for multitrunk T1,E1 and STS-3/OC3 systems
• ST-BUS clock and frame pulse sources



Pinout

  Connection Diagram


Specifications

  Parameter Symbol Min. Max. UNIT
1 Supply voltage VDD -0.3 7.0 V
2 Voltage on any pin VPIN -0.3 VDD+ 0.3 V
3 Current on any pin IPIN   30 mA
4 Storage temperature TST -55 125
5 48 SSOP package power dissipation PPD   200 mW

* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.


Description

The ZL30409 T1/E1 System Synchronizer contains a digital phase-locked loop (DPLL), which provides timing and synchronization signals for multitrunk T1 and E1 primary rate transmission links.

The ZL30409 generates ST-BUS clock and framing signals that are phase locked to either a 19.44 MHz, 2.048MHz, 1.544MHz, or 8kHz input reference.




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