ZL30414

Features: • Meets jitter requirements of Telcordia GR-253- CORE for OC-192, OC-48, OC-12, and OC-3 rates• Meets jitter requirements of ITU-T G.813 for STM- 64, STM-16, STM-4 and STM-1 rates• Provides four LVPECL differential output clocks at 622.08 MHz • Provides a CML diff...

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SeekIC No. : 004550964 Detail

ZL30414: Features: • Meets jitter requirements of Telcordia GR-253- CORE for OC-192, OC-48, OC-12, and OC-3 rates• Meets jitter requirements of ITU-T G.813 for STM- 64, STM-16, STM-4 and STM-1 ra...

floor Price/Ceiling Price

Part Number:
ZL30414
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/3/27

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Product Details

Description



Features:

• Meets jitter requirements of Telcordia GR-253- CORE for OC-192, OC-48, OC-12, and OC-3 rates
• Meets jitter requirements of ITU-T G.813 for STM- 64, STM-16, STM-4 and STM-1 rates
• Provides four LVPECL differential output clocks at 622.08 MHz
• Provides a CML differential clock at 155.52 MHz
• Provides a single-ended CMOS clock at 19.44 MHz
• Lock Indicator
• Provides enable/disable control of output clocks
• Accepts a CMOS reference at 19.44 MHz
• 3.3 V supply



Application

• SONET/SDH line cards
• Network Element timing cards



Pinout

  Connection Diagram


Specifications

  Parameter Symbol Min.‡ Max.‡ UNIT
1 Supply voltage VDDR,VCCR TBD TBD V
2 Voltage on any pin VPIN -0.5 VCC+0.5
VDD+0.5
V
3 Current on any pin IPIN -0.5 30 mA
4 ESD Rating VESD   1250 V
5 Storage temperature TST -55 125
6 Package power dissipation PPD   0.8 W

† Voltages are with respect to ground unless otherwise stated.
‡ Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.



Description

The ZL30414 is an analog phase-locked loop (APLL) designed to provide jitter attenuation and rate conversion for SDH (Synchronous Digital Hierarchy) and SONET (Synchronous Optical Network) networking equipment. The ZL30414 generates very  low jitter clocks that meet the jitter requirements of Telcordia GR-253-CORE OC-192, OC-48, OC-12, OC- 3 rates and ITU-T G.813 STM-64, STM-16, STM-4 and STM-1 rates.

The ZL30414 accepts a CMOS compatible reference at 19.44 MHz and generates four LVPECL differential output clocks at 622.08 MHz, a CML differential clock at 155.52 MHz and a single-ended CMOS  clock at 19.44 MHz. The output clocks can be individually enabled or disabled. The ZL30414 provides a LOCK indication.




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