ACT-PS512K8

Features: Low Power Monolithic CMOS 512K x 8 SRAMOperating Temperature Range Full Military (-55°C to +125°C) Industrial (-40°C to +85°C)Burn-in and Temperature Cycle Available10, 12, 15, 17, 20 & 25ns Access Times+5V Power Supply Industry Standard Pinouts Center Power / Ground PinsTTL Compatib...

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ACT-PS512K8 Picture
SeekIC No. : 004268093 Detail

ACT-PS512K8: Features: Low Power Monolithic CMOS 512K x 8 SRAMOperating Temperature Range Full Military (-55°C to +125°C) Industrial (-40°C to +85°C)Burn-in and Temperature Cycle Available10, 12, 15, 17, 20 &...

floor Price/Ceiling Price

Part Number:
ACT-PS512K8
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

Rating

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Upload time: 2024/4/27

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Product Details

Description



Features:

 Low Power Monolithic CMOS 512K x 8 SRAM
 Operating Temperature Range
    Full Military (-55°C to +125°C)
    Industrial (-40°C to +85°C)
 Burn-in and Temperature Cycle Available
 10, 12, 15, 17, 20 & 25ns Access Times
 +5V Power Supply
Industry Standard Pinouts
    Center Power / Ground Pins
 TTL Compatible I/O
 3.3V Device I/O Interfacing
 JEDEC Standard 36 pin Plastic SOJ Package
     36 Lead, .93" x .405" x 0.148 Small Outline J lead (SOJ), Aeroflex code# "L2"
 Fully Static Operation
    No Clocks or Refresh Required



Specifications

Symbol

Parameter

MINIMUM

MAXIMUM

Units

TC

Case Operating Temperature

-55

+125

°C

TSTG

Storage Temperature

-65

+150

°C

PD

Maximum Package Power Dissipation

 

1.0

W

VG

Maximum Signal Voltage to Ground

-0.5

VCC + 0.5

V

VCC

Power Supply Voltage

-0.5

+7.0

V




Description

The ACT-PS512K8 is a Plastic High Speed, 4 Megabit (4,194,304 bits) CMOS Monolithic SRAM organized as 524,288 words by 8 bits. Designed for high-speed, high density, high reliablility, mass memory and fast cache system applications.

The plastic monolithic ACT-PS512K8 is input and output TTL compatible. Writing is executed when the write enable (WE) and chip enable (CE) inputs are low. Reading is accomplished when WE is high and CE and output enable (OE) are both low. Access time grades of 10ns 12ns, 15ns, 17ns, 20ns and 25ns are standard.




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