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AV9173-15

Features: • Phase-detector/VCO circuit block• Ideal for genlock system• Reference clock range 12 kHz to 1 MHz (see specification of output clock range)• Output clock range 0.625 to 37.5 MHz for CLK1, depending on input conditions (see Table 1) on page 2.• Provides h-s...

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SeekIC No. : 004291810 Detail

AV9173-15: Features: • Phase-detector/VCO circuit block• Ideal for genlock system• Reference clock range 12 kHz to 1 MHz (see specification of output clock range)• Output clock range 0....

AV9173-15 Data Sheet

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Part Number:
AV9173-15
Supply Ability:
5000

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  • 1~5000
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  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Phase-detector/VCO circuit block
• Ideal for genlock system
• Reference clock range 12 kHz to 1 MHz
  (see specification of output clock range)
• Output clock range 0.625 to 37.5 MHz for CLK1,
  depending on input conditions (see Table 1) on page 2.
• Provides h-sync capability with CLK1 outputs
  15 to 37.5 MHz for 15kHz input
• On-chip loop filter
• Single 5 volt power supply
• Low power CMOS technology
• Small 8-pin DIP or SOIC package


Pinout

Connection Diagram


Specifications

VDD (referenced to GND) . . . . . . . . . . . .  . . . .  . . . . .  ..  . . . . . . 7.0 V
Operating Temperature under Bias . . . . . . . . . . . . .  . . 0°C to +70°C
Storage Temperature . . . . . . . . . . . . . . . . . . . . .  . 65°C to +150°C
Voltage on I/O pins referenced to GND . . GND 0.5 V to VDD + 0.5 V
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . .   . . 0.5 watts
Stresses above those listed under Absolute Maximum Ratings above may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or any other conditions above those listed in the operational sections
of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.


Description

The AV9173-15 provides the analog circuit blocks required for implementing a video genlock dot (pixel) clock generator. It contains a phase detector, charge pump, loop filter, and voltage-controlled oscillator (VCO). By grouping these critical analog blocks into one IC and utilizing external digital functions, performance and design flexibility are optimized as are development time and system cost.

When used with an external clock divider, the AV9173-15 forms a Phase-Locked Loop configured as a frequency synthesizer. The AV9173-15 is designed to accept video horizontal synchronization (h-sync) pulses and produce a video dot clock. A separated, negative-going sync input reference pulse is required at pin 2 (I N).

The AV9173-15 is also suited for other clock recovery applications in such areas as data communications.




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