CD4053BC

Features: *Wide range of digital and analog signal levels:digital 3 15V, analog to 15Vp-p*Low ON resistance: 80 (typ.) over entire 15Vp-p signal-input range for VDD - VEE= 15V*High OFF resistance:channel leakage of ±10 pA (typ.) at VDD - VEE = 10V Logic level conversion for digital addressing...

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SeekIC No. : 004311312 Detail

CD4053BC: Features: *Wide range of digital and analog signal levels:digital 3 15V, analog to 15Vp-p*Low ON resistance: 80 (typ.) over entire 15Vp-p signal-input range for VDD - VEE= 15V*High OFF resistan...

floor Price/Ceiling Price

Part Number:
CD4053BC
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/17

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Product Details

Description



Features:

*Wide range of digital and analog signal levels:
digital 3 15V, analog to 15Vp-p
*Low "ON" resistance:
80 (typ.) over entire 15Vp-p signal-input range for VDD - VEE= 15V
*High "OFF" resistance:
channel leakage of ±10 pA (typ.) at VDD - VEE = 10V Logic level conversion for digital addressing signals of 3 15V (VDD- VSS= 3 15V) to switch analog signals to 15 Vp-p (VDD- VEE =15V)
*Matched switch characteristics:
RON = 5 (typ.) for VDD - VEE = 15V
*Very low quiescent power dissipation under all digital-control input and supply conditions:
1 W (typ.) at VDD - VSS = VDD - VEE = 10V
*Binary address decoding on chip





Specifications

Supply Voltage (VDD )-0.5V to.+18VDC
Input Voltage (VIN ) -0.5V to VDD. +0.5VDC
Storage Temperature Range (TS )-65 oC to. +150 oC
Power Dissipation (PD)
Dual-In-Line 700 mW
Small Outline 500 mW
Lead Temperature (TL)
(Soldering, 10 seconds) 260°C




Product Product status Eco Status Pricing* Package type Leads Packing method Package Drawing Package Marking Convention**
CD4053BCM Full Production RoHS Compliant $0.23 SOIC 16 RAIL Line 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: CD4053BCM
CD4053BCMX Full Production RoHS Compliant $0.23 SOIC 16 TAPE REEL Line 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: CD4053BCM
CD4053BCN Full Production RoHS Compliant $0.428 DIP 16 RAIL Line 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&4 (4-Digit Date Code)
&K Line 2: CD4053BCN
CD4053BCSJ Full Production RoHS Compliant $0.349 SOP 16 RAIL Line 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: CD4053BC
CD4053BCSJX Full Production RoHS Compliant $0.349 SOP 16 TAPE REEL Line 1: $Y (Fairchild logo)
&Z (Asm. Plant Code)
&2 (2-Digit Date Code)
&K Line 2: CD4053BC
* Fairchild 1,000 piece Budgetary Pricing
** A sample button will appear if the part is available through Fairchild's on-line samples program. If there is no sample button, please contact a Fairchild distributor to obtain samples

Package marking information for product CD4053BC is available. Click here for more information .





Description

The CD4051BC, CD4052BC, and CD4053BC analog multiplexers/demultiplexers are digitally controlled analog switches having low "ON" impedance and very low "OFF"leakage currents. Control of analog signals up to 15Vp-pcan be achieved by digital signal amplitudes of 3-15V. For example, if VDD= 5V, VSS= 0V and VEE = - 5V, analog signals from -5V to +5V can be controlled by digital inputs of 0-5V. The multiplexer circuits dissipate extremely low quiescent power over the full VDD- VSS and VDD- VEE supplyvoltage ranges, independent of the logic state of the control signals. When a logical "1" is present at the inhibit input terminal all channels are "OFF".


CD4051BC is a single 8-channel multiplexer having three binary control inputs. A, B, and C, and an inhibit input. The three binary signals select 1 of 8 channels to be turned "ON" and connect the input to the output.


CD4052BC is a differential 4-channel multiplexer having two binary control inputs, A and B, and an inhibit input. The two binary input signals select 1 or 4 pairs of channels to be turned on and connect the differential analog inputs to the differential outputs.


CD4053BC is a triple 2-channel multiplexer having three separate digital control inputs, A, B, and C, and an inhibit input. Each control input selects one of a pair of channels which are connected in a single-pole double-throw configuration.





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