FPD1000V

Features:

 31 dBm Linear Output Power
 16 dB Power Gain
 Useable Gain to 10 GHz
 41 dBm Output IP3
 Maximum Stable Gain of 20 dB
 50% Power-Added Efficiency
 10V Operation / Plated Source Thru-Vias


Specifications

Parameter	Symbol	Test Conditions	Min	Max	Units
Drain-Source Voltage	VDS	-3V < VGS < +0V		12	V
Gate-Source Voltage	VGS	0V < VDS < +8V		-3	V
Drain-Source Current	IDS	For VDS > 2V		IDSS	mA
Gate Current	IG	Forward or reverse current		+20/-20	mA
RF Input Power2	PIN	Under any acceptable bias state		575	mW
Channel Operating Temperature	TCH	Under any acceptable bias state		175	ºC
Storage Temperature	TSTG	Non-Operating Storage	-40	150	ºC
Total Power Dissipation	PTOT	See De-Rating Note below		7.0	W
Gain Compression	Comp.	Under any bias conditions		5	dB
Simultaneous Combination of Limits3		2 or more Max. Limits		80	%

¹TAmbient = 22°C unless otherwise noted ²Max. RF Input Limit must be further limited if input V_SWR > 2.5:1
³Users should avoid exceeding 80% of 2 or more Limits simultaneously
Notes:
• Operating conditions that exceed the Absolute Maximum Ratings could result in permanent damage to the device.
• Thermal Resitivity specification assumes a Au/Sn eutectic die attach onto a Au-plated copper heatsink or rib.
• Power Dissipation defined as: P_TOT (P_DC + P_IN) P_OUT, where
                                                   P_DC: DC Bias Power
                                                   P_IN: RF Input Power
                                                   P_OUT: RF Output Power
• Absolute Maximum Power Dissipation to be de-rated as follows above 22°C:
                                                   P_TOT=7.0W (0.046W/°C) x T_HS
where THS = heatsink or ambient temperature above 22°C
(coefficient of de-rating formula is the Thermal Conductivity)
Example: For a 85°C heatsink temperature: P_TOT = 7.0W (0.046 x (85 22)) = 4.1W
• The use of a filled via-hole directly beneath the exposed heatsink tab on the bottom of the package is strongly recommended to provide for adequate thermal management. Ideally the bottom of the circuit board is affixed to a heatsink or thermal radiator.

Description

The FPD1000V is a discrete depletion mode AlGaAs/InGaAs pseudomorphic High Electron Mobility Transistor (pHEMT), optimized for power applications in L- and C-Bands. The FPD1000V includes Source plated thru-vias, and does not require wire bonds to the Source.

FPD1000V applications include drivers or output stages in PCS/Cellular base station transmitter amplifiers, as well as other power applications in WLL/WLAN amplifiers.