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FQB13N50C

Features: • 13A, 500V, RDS(on) = 0.48Ω @VGS = 10 V• Low gate charge ( typical 43nC)• Low Crss ( typical 20pF)• Fast switching• 100% avalanche tested• Improved dv/dt capabilitySpecifications Symbol Parameter FQB13N50C / FQI13N50C Units VDSS ...

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SeekIC No. : 004343085 Detail

FQB13N50C: Features: • 13A, 500V, RDS(on) = 0.48Ω @VGS = 10 V• Low gate charge ( typical 43nC)• Low Crss ( typical 20pF)• Fast switching• 100% avalanche tested• Improv...

FQB13N50C Data Sheet

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Part Number:
FQB13N50C
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• 13A, 500V, RDS(on) = 0.48Ω @VGS = 10 V
• Low gate charge ( typical 43nC)
• Low Crss ( typical 20pF)
• Fast switching
• 100% avalanche tested
• Improved dv/dt capability


Specifications

Symbol Parameter
FQB13N50C / FQI13N50C
Units
VDSS Drain-Source Voltage
500
V
ID Drain Current - Continuous (TC = 25°C)
- Continuous (TC = 100°C)
13
A
8
A
IDM Drain Current - Pulsed (Note 1)
52
A
VGSS Gate-Source Voltage
± 30
V
EAS Single Pulsed Avalanche Energy (Note 2)
860
mJ
IAR Avalanche Current (Note 1)
13
A
EAR Repetitive Avalanche Energy (Note 1)
19.5
mJ
dv/dt Peak Diode Recovery dv/dt (Note 3)
4.5
V/ns
PD Power Dissipation (TA = 25°C) *
3.13
W
Power Dissipation (TC = 25°C)
- Derate above 25°C
195
W
1.56
W/°C
TJ, TSTG Operating and Storage Temperature Range
-55to+150
°C
TL Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds
300
°C



Description

These N-Channel enhancement mode power FQB13N50C field effect transistors are produced using Fairchild's proprietary, planar stripe, DMOS technology.

This advanced technology FQB13N50C has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. FQB13N50C is well suited for high efficiency switched mode power supplies, active power factor correction, electronic lamp ballasts based on half bridge topology.




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