Purchase GAL20V8ZD, In-stock GAL20V8ZD From SeekIC.
Part Number: GAL20V8ZD
Description: The GAL20V8Z and GAL20V8ZD, at 100 µA standby current and 12ns propagation delay provides the hi...
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GAL20V8ZD
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Suppliers
DataSheet
General Description
GAL20V8ZD General Description
The GAL20V8Z and GAL20V8ZD, at 100 µA standby current and 12ns propagation delay provides the highest speed and lowest power combination PLD available in the market. The GAL20V8Z/ZD is manufactured using Lattice Semiconductor's ad-
vanced zero power E2 CMOS process, which combines CMOS with Electrically Erasable (E2 ) floating gate technology.
The GAL20V8Z uses Input Transition Detection (ITD) to put the device in standby mode and is capable of emulating the full func- tionality of the standard GAL20V8. The GAL20V8ZD utilizes a dedicated power-down pin (DPP) to put the device in standby mode. It has 19 inputs available to the AND array.
Unique test circuitry and reprogrammable cells allow complete AC, DC, and functional testing during manufacture. As a result, Lattice Semiconductor delivers 100% field programmability and function- ality of all GAL products. In addition, 100 erase/write cycles and data retention in excess of 20 years are specified.
GAL20V8ZD Maximum Ratings
Supply voltage VCC ......................................... .5 to +7V
Input voltage applied .......................... 2.5 to VCC +1.0V
Off-state output voltage applied ......... 2.5 to VCC +1.0V
Storage Temperature ................................... 65 to 150
Ambient Temperature with
Power Applied .............................................. 55 to 125
1. Stresses above those listed under the "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress only
ratings and functional operation of the device at these or at any
other conditions above those indicated in the operational sections of
this specification is not implied (while programming, follow the
programming specifications).
Input voltage applied .......................... 2.5 to VCC +1.0V
Off-state output voltage applied ......... 2.5 to VCC +1.0V
Storage Temperature ................................... 65 to 150
Ambient Temperature with
Power Applied .............................................. 55 to 125
1. Stresses above those listed under the "Absolute Maximum Ratings"
may cause permanent damage to the device. These are stress only
ratings and functional operation of the device at these or at any
other conditions above those indicated in the operational sections of
this specification is not implied (while programming, follow the
programming specifications).
GAL20V8ZD Features
• ZERO POWER E2CMOS TECHNOLOGY
- 100µA Standby Current
- Input Transition Detection on GAL20V8Z
- Dedicated Power-down Pin on GAL20V8ZD
- Input and Output Latching During Power Down
• HIGH PERFORMANCE E2 CMOS TECHNOLOGY
- 12 ns Maximum Propagation Delay
- Fmax = 83.3 MHz
- 8 ns Maximum from Clock Input to Data Output
- TTL Compatible 16 mA Output Drive
- UltraMOS® Advanced CMOS Technology
• E2 CELL TECHNOLOGY
- Reconfigurable Logic
- Reprogrammable Cells
- 100% Tested/100% Yields
- High Speed Electrical Erasure (<100ms)
- 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
- Maximum Flexibility for Complex Logic Designs
- Programmable Output Polarity
- Architecturally Similar to Standard GAL20V8
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
- 100% Functional Testability
• APPLICATIONS INCLUDE:
- Battery Powered Systems
- DMA Control
- State Machine Control
- High Speed Graphics Processing
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
- 100µA Standby Current
- Input Transition Detection on GAL20V8Z
- Dedicated Power-down Pin on GAL20V8ZD
- Input and Output Latching During Power Down
• HIGH PERFORMANCE E2 CMOS TECHNOLOGY
- 12 ns Maximum Propagation Delay
- Fmax = 83.3 MHz
- 8 ns Maximum from Clock Input to Data Output
- TTL Compatible 16 mA Output Drive
- UltraMOS® Advanced CMOS Technology
• E2 CELL TECHNOLOGY
- Reconfigurable Logic
- Reprogrammable Cells
- 100% Tested/100% Yields
- High Speed Electrical Erasure (<100ms)
- 20 Year Data Retention
• EIGHT OUTPUT LOGIC MACROCELLS
- Maximum Flexibility for Complex Logic Designs
- Programmable Output Polarity
- Architecturally Similar to Standard GAL20V8
• PRELOAD AND POWER-ON RESET OF ALL REGISTERS
- 100% Functional Testability
• APPLICATIONS INCLUDE:
- Battery Powered Systems
- DMA Control
- State Machine Control
- High Speed Graphics Processing
• ELECTRONIC SIGNATURE FOR IDENTIFICATION
GAL20V8ZD Connection Diagram
GAL20V8ZD-12QJ
PDF/DataSheet Download
- Datasheet: GAL20V8ZD-12QJ
- File Size: 315292 KB
- Manufacturer: LATTICE [Lattice Semiconductor]
- Click here to Download
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