MFG:TSSOP48 Package Cooled:87 D/C:MIT
MFG: TSSOP48
Package Cooled: 87
D/C: MIT
Description: The M5M29KE131BVP is a Stacked micro Multi Chip Package that contents 2 Dies of 64M-bit Flash memory i...
The M5M29KE131BVP is a Stacked micro Multi Chip Package that contents 2 Dies of 64M-bit Flash memory in a 48-pin TSOP(I) for lead free use.
128M-bit Flash memory is a 16,777,216 bytes / 8,388,608 words, single power supply and high performance nonvolatile memory fabricated by CMOS technology for the peripheral circuit and DINOR IV (Divided bit-line NOR IV) architecture for the memory cell. All memory blocks are locked and can not be programmed or erased, when WP# is Low. Using Software Lock Release function, program or erase operation can be executed.
The M5M29KE131BVP is suitable for a high performance cellular phone and a mobile PC that are required to be small mounting area, weight and small power dissipation.
|
Symbol |
Parameter |
Conditions |
Min. |
Max. |
Units |
|
VCC |
VCC Voltage |
With Respect to GND |
-0.2 |
4.6 |
V |
|
VI1 |
All Input or Output Voltage 1) |
-0.6 |
4.6 |
V | |
|
Ta |
Ambient Temperature |
-40 |
85 |
°C | |
|
Tbs |
Temperature under Bias |
-50 |
95 |
°C | |
|
Tstg |
Storage Temperature |
-65 |
125 |
°C | |
|
Iout |
Output Short Circuit Current |
100 |
mA |
1)Minimum DC voltage is 0.6V on input / output pins. During transitions, the level may undershoot to 2.0V for periods <20ns. Maximum DC voltage on input / output pins is VCC+0.5V which, during transitions, may overshoot to VCC+1.5V for periods <20ns.
M5M29KE131BVP
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