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Part Number: MC68HC711P2
Description: The MC68HC11P2 8-bit microcomputer is a member of the M68HC11 family of HCMOS microcomputers. In addit...
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MC68HC711P2
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DataSheet
General Description
MC68HC711P2 General Description
The MC68HC11P2 8-bit microcomputer is a member of the M68HC11 family of HCMOS microcomputers. In addition to 32kbytes of ROM, the MC68HC11P2 contains 1kbyte of RAM and 640 bytes of EEPROM. With its advanced timer and communication features (including MI BUS(1)) the MC68HC11P2 is especially suitable for mobile communications and automotive applications.
The MC68HC711P2 is an EPROM version of the MC68HC11P2, with the User ROM replaced by a similar amount of EPROM. All references to the MC68HC11P2 apply equally to the MC68HC711P2, unless otherwise noted. References specific to the MC68HC711P2 are italicised in the text.
MC68HC711P2 Maximum Ratings
| Rating | Symbol | Value | Unit |
| Supply voltage (1) | VDD | 0.3 to +7.0 | V |
| Input voltage (1) | Vin | 0.3 to +7.0 | V |
| Operating temperature range MC68HC11P2, MC68HC711P2 |
TA | TL to TH 40 to +85 |
°C |
| Storage temperature range | Tstg | 55 to +150 | °C |
| Current drain per pin (2) not VDD, VSS, VDD AD, VSS AD, VRH or VRL |
ID | 25 | mA |
2. Maximum current drain per pin is for one pin at a time, observing maximum power dissipation limits.
MC68HC711P2 Features
• Low power, high performance M68HC11 CPU core, with 4MHz bus capability
• Power saving PLL clock circuit, with automatic disable during WAIT mode
• 32kbytes of User ROM (MC68HC11P2); 32kbytes User EPROM (MC68HC711P2)
• 1kbyte of RAM
• 640 bytes of byte-erasable User EEPROM, with on-chip charge pump
• Up to 50 general purpose I/O lines, plus up to 12 input-only lines
• Non-multiplexed address and data buses, permitting direct access to the full 64k address map
• 16-bit timer with 3/4 input captures and 4/5 output compares; pulse accumulator and COP watchdog timer
• Three 8- or 9-bit SCI subsystems, two with MI BUS† capability
• SPI subsystem, with software selectable MSB/LSB first option
• 8-channel, 8-bit analog-to-digital (A/D) converter
• Four 8-bit PWM timer channels (may be concatenated to form one, or two, 16-bit channels)
• Available in 84-pin PLCC or 84-pin CERQUAD packages
• Power saving PLL clock circuit, with automatic disable during WAIT mode
• 32kbytes of User ROM (MC68HC11P2); 32kbytes User EPROM (MC68HC711P2)
• 1kbyte of RAM
• 640 bytes of byte-erasable User EEPROM, with on-chip charge pump
• Up to 50 general purpose I/O lines, plus up to 12 input-only lines
• Non-multiplexed address and data buses, permitting direct access to the full 64k address map
• 16-bit timer with 3/4 input captures and 4/5 output compares; pulse accumulator and COP watchdog timer
• Three 8- or 9-bit SCI subsystems, two with MI BUS† capability
• SPI subsystem, with software selectable MSB/LSB first option
• 8-channel, 8-bit analog-to-digital (A/D) converter
• Four 8-bit PWM timer channels (may be concatenated to form one, or two, 16-bit channels)
• Available in 84-pin PLCC or 84-pin CERQUAD packages
MC68HC711P2
PDF/DataSheet Download
- Datasheet: MC68HC711P2
- File Size: 1412499 KB
- Manufacturer: MOTOROLA [Motorola, Inc]
- Click here to Download
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