Features: Complete 2.7GHz single chip system Optimised for low phase noise Selectable divide by two prescaler Selectable reference division ratio Charge pump disable Varactor line disable 'Inlock' flag Two switching ports in 14 pin version Four switching ports in 16 pin version Pin compatible wit...
SP5658: Features: Complete 2.7GHz single chip system Optimised for low phase noise Selectable divide by two prescaler Selectable reference division ratio Charge pump disable Varactor line disable 'Inlock' ...
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Complete 2.7GHz single chip system
Optimised for low phase noise
Selectable divide by two prescaler
Selectable reference division ratio
Charge pump disable
Varactor line disable
'Inlock' flag
Two switching ports in 14 pin version
Four switching ports in 16 pin version
Pin compatible with SP5659 I 2 C bus low phase noise synthesiserPP
ESD protection (Normal ESD handling procedures should be observed)

|
Characteristic |
Pin (SP5658S) |
Min |
Max |
Units |
Conditions |
|
Supply voltage, VCC RF input voltage RF input DC offset Port voltage Total port current Lock output DC offset Charge pump DC offset Drive DC offset Crystal DC offset Data, Clock, Enable & Disable DC offset |
12 13, 14 13, 14 7 10 7 10 7 10 11 1 16 2 3 6 |
0.3 0.3 0.3 0.3 0.3 0.3 0.3 0.3 0.3 |
7 2.5 VCC +0.3 14 6 50 VCC +0.3 VCC +0.3 VCC +0.3 VCC +0.3 VCC +0.3 |
V V pp V V V mA V V V V V |
AC coupled as per application Port in off state Port in on state |
| Storage temperature Junction temperature |
|
55 |
+125 150 |
°C °C |
|
| MP14 Thermal Resistance Chip to ambient 123 °C/W Chip to case 45 °C/W MP16 Thermal Resistance Chip to ambient Chip to case |
|
|
111 41 |
°C/W °C/W |
|
| Power consumption at VCC=5.5V |
|
|
407 |
mW |
All ports off, prescaler enabled |
| ESD protection |
ALL |
2 |
|
kV |
MILSTD 883 TM 3015 |