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SAB9081

Features: · Double window Picture-in-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution· Internal 1-Mbit DRAM· Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel· One PLL which generates the line-locked clocks for...

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SeekIC No. : 004484169 Detail

SAB9081: Features: · Double window Picture-in-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution· Internal 1-Mbit DRAM· Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance)...

SAB9081 Data Sheet

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Part Number:
SAB9081
Supply Ability:
5000

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  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

· Double window Picture-in-Picture (PIP) in interlaced or non-interlaced mode at 8-bit resolution
· Internal 1-Mbit DRAM
· Three 8-bit Analog-to-Digital Converters (ADCs) (7-bit performance) with clamp circuit for each acquisition channel
· One PLL which generates the line-locked clocks for the subchannel
· One PLL which generates the line-locked clocks for the main and display channels
· Three 8-bit Digital-to-Analog Converters (DACs)
· Linear zoom in both horizontal and vertical directions for the subchannel
· Linear zoom in horizontal direction for the main channel.


Pinout

Connection Diagram


Specifications

SYMBOL PARAMETER MIN. MAX. UNIT
VDD supply voltage range -0.5 5.0 V
Tstg storage temperature -25 +150 °C
Tamb ambient temperature 0 70 °C
Vesd electrostatic discharge handling - 2 kV
Rth(j-a) thermal resistance - 45 K/W
Pmax maximum power dissipation - 1.0 W



Description

The SAB9081 is a multistandard PIP controller which can be used in double window applications. The SAB9081 inserts one or two live video signals with reduced size into another live video signal. The incoming video signals are expected to be analog baseband signals.

The conversion of SAB9081 to the digital environment is done on chip with ADCs. Processing and storage of the video data is done entirely in the digital domain. The conversion back to the analog domain is done by DACs.

Internal clocks of SAB9081 are generated by PLLs which lock on to the applied horizontal and vertical syncs.

The main input channel of SAB9081 is compressed horizontally by a factor of two and directly fed to the output. After compression, a horizontal expansion of two is possible for the main channel.

The subchannel is also compressed horizontally by a factor of two but stored in memory before  SAB9081 is fed to the outputs.




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