Features: Complete 2.7GHz single chip system Compatible with UK DTT offset requirements Optimised for low phase noise Selectable divide by two prescaler Selectable reference division ratio Selectable reference/comparison frequency output Selectable charge pump current Four selectable I2C bus addr...
SP5669: Features: Complete 2.7GHz single chip system Compatible with UK DTT offset requirements Optimised for low phase noise Selectable divide by two prescaler Selectable reference division ratio Selectab...
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Complete 2.7GHz single chip system
Compatible with UK DTT offset requirements
Optimised for low phase noise
Selectable divide by two prescaler
Selectable reference division ratio
Selectable reference/comparison frequency output
Selectable charge pump current
Four selectable I2C bus address
5level ADC
Pin compatible with the SP5658 3wire bus controlled synthesiser and SP5659 I2C bus synthesiser and SP5659 I2C bus synthesiser ESD protection;(Normal ESD handling procedures should be observed)

|
Characteristic |
Pin (SP5658S) |
Min |
Max |
Units |
Conditions |
|
Supply Voltage, V CC RF input voltage RF input DC offset Port voltage Total port current ADC input DC offset REF/COMP output DC offset Charge pump DC offset Drive DC offset Crystal oscillator DC offset Address DC offset SDA and SCL DC offset |
12 13,14 13,14 710 710 710 11 3 1 16 2 4 5, 6 |
0.3 0.3 0.3 0.3 0.3 0.3 0.3 0.3 0.3 0.3 |
7 2.5 V CC +0.3 14 6 50 V CC +0.3 V CC +0.3 V CC +0.3 V CC +0.3 V CC +0.3 V CC +0.3 6V |
V V pp V V V mA V V V V V V V |
AC coupled as per application Port in off state Port in on state |
| Storage temperature Junction temperature |
|
55 |
+125 150 |
°C °C |
|
| MP16 Thermal Resistance Chip to ambient Chip to case MP16 Thermal Resistance Chip to ambient Chip to case |
|
|
111 41 |
°C/W °C/W |
|
| Power consumption at VCC=5.5V |
|
|
468 |
mW |
All ports off, prescaler enabled |
| ESD protection |
ALL |
4 |
|
kV |
MILSTD 883 TM 3015 |
The SP5669 is a single chip frequency synthesiser designed for tuning systems up to 2.7GHz and offers step size compatible with DTT offset requirements.
The RF preamplifier SP5669 drives a divide by two prescaler which can be disabled for applications up to 2GHz, allowing direct interfacing with the programmable divider so enabling a step size equal to the comparison frequency. For applications up to 2.7GHz the divide by two is enabled, giving a step size of twice the comparison frequency.
The comparison frequency is obtained either from an onchip crystal controlled oscillator, or from an external source. The oscillator frequency Fref or the comparison frequency Fcomp may be switched to the REF/COMP output. This feature is ideally suited to providing the reference frequency for a second synthesiser such as in a double conversion tuner (see Fig. 8).
The synthesiser SP5669 is controlled via an I 2 C bus, and responds to one of four programmable addresses which are selected by applying a specific voltage to the 'address' input. This feature enables two or more synthesisers to be used in a system.
The SP5669 contains four switching ports P0P3 and a 5level ADC. The output of the ADC can be read via the I 2 C bus.
The SP5669 also contains a varactor line disable and chargepump disable facility.